{"library":"riscv","type":"library","category":null,"description":"Low level access to RISC-V processors","language":"rust","status":"active","version":"0.16.1","tags":["riscv","embedded","register","processor"],"last_verified":"Tue Jun 16","install":[{"cmd":"# Cargo.toml\n[dependencies]\nriscv = \"0.16.1\"","imports":["use riscv::register::mstatus;"]},{"cmd":"cargo add riscv","imports":[]}],"homepage":"https://github.com/rust-embedded/riscv","github":"https://github.com/rust-embedded/riscv","docs":"https://docs.rs/riscv/","changelog":null,"pypi":null,"npm":null,"openapi_spec":null,"status_page":null,"smithery":null,"compatibility":null}