{"library":"pyvcd","title":"Python VCD File Support","description":"pyvcd is a Python library designed for working with Value Change Dump (VCD) files. It provides functionalities for both reading and writing these standard files used to record signal activity in digital logic simulations. The current version is 0.4.1, and releases are generally made on an as-needed basis for bug fixes or minor enhancements.","language":"python","status":"active","last_verified":"Fri Apr 17","install":{"commands":["pip install pyvcd"],"cli":null},"imports":["from pyvcd import VCDWriter","from pyvcd import VCDReader"],"auth":{"required":false,"env_vars":[]},"quickstart":{"code":"from datetime import datetime\nfrom pyvcd import VCDWriter\n\n# Create a VCD file named 'test.vcd'\nwith VCDWriter(open('test.vcd', 'w'), timescale='1 ns', date=datetime.now()) as writer:\n    # Enter a scope named 'top' of type 'module'\n    scope = writer.scope_stack.enter_scope('top', 'module')\n    \n    # Define a 1-bit 'clk' wire and change its value over time\n    writer.change(scope.var('clk', 'wire', 1), 0, 0)   # At time 0, clk is 0\n    writer.change(scope.var('clk', 'wire', 1), 1, 100) # At time 100 ns, clk is 1\n    writer.change(scope.var('clk', 'wire', 1), 0, 200) # At time 200 ns, clk is 0\n    \n    # Define another 1-bit 'rst_n' wire\n    writer.change(scope.var('rst_n', 'wire', 1), 1, 0)\n    writer.change(scope.var('rst_n', 'wire', 1), 0, 100)\n    writer.change(scope.var('rst_n', 'wire', 1), 1, 200)\n    \n    # Leave the current scope\n    writer.scope_stack.leave_scope()\n\nprint(\"VCD file 'test.vcd' generated successfully.\")","lang":"python","description":"This example demonstrates how to create a VCD file, define a module scope, declare signals (wires), and record their value changes over time using `VCDWriter`.","tag":null,"tag_description":null,"last_tested":null,"results":[]},"compatibility":null}