{"library":"peakrdl-uvm","type":"library","category":null,"description":"PeakRDL-uvm is a Python library that generates a Universal Verification Methodology (UVM) register model from compiled SystemRDL input. It is part of the broader PeakRDL ecosystem for control and status register (CSR) automation. The current version is 2.4.0, and the project maintains an active development and release cadence.","language":"python","status":"active","version":"2.4.0","tags":["UVM","SystemRDL","register model","EDA","hardware design","verification","code generation","FPGA","ASIC"],"install":[{"cmd":"pip install peakrdl-uvm","imports":["from peakrdl_uvm import UVMExporter"]},{"cmd":"pip install peakrdl peakrdl-uvm","imports":[]}],"homepage":null,"github":"https://github.com/SystemRDL/PeakRDL-uvm","docs":null,"changelog":"https://github.com/SystemRDL/PeakRDL-uvm/releases","pypi":"https://pypi.org/project/peakrdl-uvm/","npm":null,"openapi_spec":null,"status_page":null,"smithery":null,"compatibility":{"summary":{"python_range":"3.10–3.9","success_rate":100,"avg_install_s":3.2,"avg_import_s":0.35,"wheel_type":"wheel"},"url":"https://checklist.day/v1/registry/peakrdl-uvm/compatibility"},"provenance":{"verified_status":"passing","verified_at":"Sun Jun 28","last_verified":"Sun Jun 28","next_check":"Tue Jul 28","install_tag":null}}